Dear Friends, in high-density AI power stages, MOSFET performance is no longer just about RDS(on), thermal behavior is right behind it. New device designs paired with double-sided cooling and source-down layouts help handle higher currents and power density, without the usual thermal penalties that tend to follow.

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Dear Friends,

In high-density AI power stages, MOSFET performance is no longer just about RDS(on), thermal behavior is right behind it. New device designs paired with double-sided cooling and source-down layouts help handle higher currents and power density, without the usual thermal penalties that tend to follow.

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Bodo Arlt

Special Announcement:
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MOSFETs in State-of-the-Art Packaging Meet Increasing AI Server Power Demands

Offering a powerful solution to meet the stringent thermal requirements in high power density AI server and data center Intermediate Bus Converters (IBC) DC-DC applications are AOS’ new AONC40202 and AONC68816 25V and 80V MOSFETs. These advanced solutions are available in state-of-the-art DFN 3.3x3.3 double-sided cooling, source-down packaging, engineered to meet the intensifying power needs of AI servers.

Offering a measurable heat transfer advantage for AI designs, the double-sided cooling DFN 3.3x3.3 source-down packaging delivers superior thermal performance compared to traditional DFN 3.3x3.3 packaging solutions. Plus, the AONC40202 and AONC68816 employ the latest enhanced AlphaSGT™ silicon technology, which offers a more effective solution to increase power density. This powerful combination of capabilities delivers significant system-level improvements, including enhanced thermal management, better support for power demands, improved operational efficiency, and higher overall application reliability.

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Furthermore, double-sided cooling packaging is considered the optimal solution for reducing heat generation and thermal stress compared to single-sided cooling devices. In addition to the source-down packaging benefits, it provides a larger source contact to the PCB, and its center-gate pin layout allows easier PCB routing, enabling the gate driver connection to be minimized.

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